/*
	counter3b.v
	3 bits synchronous counter
	
	This project and file(s) are released under GNU GPL v3.
	Please find license file from root directory.
	Meng Sun (c) 2013 <leon.meng.sun@gmail.com>
*/

module counter3b (CLK, nCLR, P, nHOLD);

input CLK, nCLR, nHOLD;
output [2:0] P;

wire CLK, nCLR, nHOLD;
wire [2:0] P;
wire andp2condout, wandjp0, wandkp0, wandjp1, wandkp1, wandjp2, wandkp2;

and andp2cond (andp2condout, P[0], P[1]);

and andjp0 (wandjp0, nHOLD, 1'b1);
and andkp0 (wandkp0, nHOLD, 1'b1);
and andjp1 (wandjp1, P[0], nHOLD);
and andkp1 (wandkp1, P[0], nHOLD);
and andjp2 (wandjp2, nHOLD, andp2condout);
and andkp2 (wandkp2, nHOLD, andp2condout);

jkff jkffp0 (.j(wandjp0), .k(wandkp0), .clk(CLK), .clrn(nCLR), .prn(1'b1), .q(P[0]));
jkff jkffp1 (.j(wandjp1), .k(wandkp1), .clk(CLK), .clrn(nCLR), .prn(1'b1), .q(P[1]));
jkff jkffp2 (.j(wandjp2), .k(wandkp2), .clk(CLK), .clrn(nCLR), .prn(1'b1), .q(P[2]));

endmodule
